Computer Composition Interview Questions

1. What is computer architecture?

Computer architecture refers to the overall organization of a computing system, including hardware design, instruction set, memory hierarchy, and other components. Typical characteristics include the von Neumann architecture, memory hierarchy structures, pipelining technology, etc.

2. What are the levels in the memory hierarchy?

The main four levels include registers, cache (Cache), main memory (RAM), and auxiliary storage (ROM/Hard disk). Cache utilizes the principle of locality to manage page replacement through algorithms such as LRU or FIFO.

3. Which components make up a CPU?

Core components include:

  • Control Unit (CU): Generates control signals
  • Arithmetic Logic Unit (ALU): Executes arithmetic and logical operations
  • Register File: Temporarily stores intermediate results
  • Instruction Register (IR): Stores the current instruction being executed
  • Program Counter (PC): Indicates the address of the next instruction

4. What are the key characteristics of an Instruction Set Architecture (ISA)?

Key characteristics include:

  • Instruction Format: Encoding methods for opcodes and operands
  • Addressing Modes: Immediate addressing, direct addressing, register addressing, etc.
  • Instruction Classification: Data class instructions (e.g., ADD, MOV) and control flow instructions (e.g., BR, CALL)

II. Advanced Computer Architecture

5. What is pipelining technology?

Pipelining improves processor efficiency by dividing instruction execution into multiple stages (such as fetch, decode, execute). Typical issues include:

  • Pipeline Hazards: Incorrect branch prediction caused by data dependencies
  • Stalls: Incomplete instructions leading to idle pipeline cycles

6. What is the implementation principle of virtual memory?

Virtual memory implements address mapping through page tables, expanding physical memory into a logical address space. Key mechanisms include:

  • Page Table Management: Page table entries record physical addresses
  • Page Replacement Algorithms: LRU and Belady's algorithms select pages to evict
  • Paging vs. Segmentation: Paging improves cache utilization; segmentation supports dynamic memory allocation

7. What is the workflow of an interrupt system?

Interrupt processing flow:

  1. Interrupt Occurrence: Triggers an interrupt request
  2. Interrupt Masking: System decides whether to respond
  3. Interrupt Service Routine (ISR): Executes interrupt handling logic
  4. Return from Interrupt: Restores context and returns to the main program

III. Core Concepts in Computer Organization

8. What is DMA?

Direct Memory Access (DMA) allows peripherals to read/write memory directly, reducing CPU intervention. Key characteristics include:

  • Data Transfer: Managed through a channel controller
  • Reduced CPU Burden: Avoids direct memory operations by the CPU
  • Applicable Scenarios: Large-scale data transfers (e.g., hard disk I/O)

9. How is an Input/Output system implemented?

An input/output system is implemented via:

  • Bus Architecture: Communication between CPU, memory, and peripherals through a bus
  • I/O Control Methods: Programmed I/O, interrupt-driven I/O, DMA, etc.
  • I/O Address Allocation: Static allocation (e.g., for DMA) vs. dynamic allocation (e.g., interrupts)

10. What is the principle of locality in computer organization?

The principle of locality states that a program's address space exhibits spatial and temporal locality during execution.

  • Spatial Locality: Refers to accessing contiguous memory addresses
  • Temporal Locality: Recently accessed addresses are likely to be accessed again
  • Application: Cache design is based on this principle

IV. Classic Problems in Computer Organization

11. What is a "bus" in the context of computer organization?

A bus serves as the data transmission channel between the CPU, memory, and peripherals, comprising address buses, data buses, and control buses.

  • Bus Width: Determines the data transfer rate
  • Bus Cycle: Controls the duration of data transfers
  • Bus Arbitration: Resolves conflicts when multiple devices attempt simultaneous access

12. What is a "pipeline" in computer organization?

Pipelining divides instruction execution into stages (such as fetch, decode, execute), improving efficiency through parallel processing.

  • Stalls: Incomplete instructions lead to idle cycles
  • Hazards: Data dependencies cause incorrect branch predictions
  • Optimization: Issues like branch prediction and result caching mitigate problems

13. What is "cache coherence" in computer organization?

Cache coherence ensures data consistency across multiple levels of cache (e.g., CPU caches, main memory).

  • MESI Protocol: Manages the state of cache lines
  • Replacement Policy: Selects pages to evict when capacity is full
  • Hit Rate: A key metric for measuring system performance

14. What is an "instruction cycle" in computer organization?

An instruction cycle is the time required for a CPU to execute one instruction, consisting of three stages: fetch, decode, and execute.

  • Cycle Time: Determines processor speed
  • Pipeline Cycle: The sum of times across different pipeline stages
  • Instruction Scheduling: Optimizes execution order to minimize idle time

15. What is "bus timing" in computer organization?

Bus timing defines the temporal relationship during data transfers, including:

  • Cycle Delimitation: Each cycle completes a specific operation
  • Phase Control: Regulates the sequence of data transfer steps
  • Timing Errors: Can lead to failed data transmission
  • Bus Protocols: Standards such as PCIe and USB define timing specifications